A Comparative Analysis of Different Comparators for Analog-to-Digital Convertor Applications: A Review

Сравнительный анализ различных компараторов для приложений аналого‑цифровых преобразователей: обзор
Dasamandam Venkata Supriya, Saleem Syed, E. Kalyana Pallavi, A. Sahithi, Yadiki Ankitha, Thogata Bharath Kumar
2025-12-15

CMOS dynamic comparatorCNTFETanalog-to-digital converterlatencypower consumption
In this study, we look at two technologies Carbon Nano Tube Field Effect Transistors (CNTFETs) and CMOS-based dynamic comparators. Six CNTFET-based comparator architectures two-stage, push-pull, and double dynamic comparators are implemented by using hspice tool in 32nm technology, and using the cadence vistuso tool in 180nm technology, a CMOS-based dynamic comparator is created and simulated 500 MHz. Important performance matrix is evaluated, including area, average power and latency. The result reveals the CNTFET-based comparators achieve up to three times reduced power consumption, higher speed, and increased robustness under temperature and supply variations. In comparison, the CMOS two-stage device uses 32% less power and work 20% faster than typical CMOS designs make considerable advances, CNTFET-based circuits are more efficient and scalable, making them viable options for next-generation low-power, high-speed ADCs.
1
A CMOS two-stage device uses 32% less power and operates 20% faster than typical CMOS designs, but CNTFET circuits are overall more efficient and scalable for low-power, high-speed ADCs.
2
A CMOS-based dynamic comparator was implemented and simulated at 180nm using Cadence Vistuso and operated at 500 MHz.
3
CNTFET-based comparators achieve up to three times reduced power consumption compared to CMOS counterparts.
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CNTFET-based comparators show higher speed and increased robustness under temperature and supply variations.
5
Six CNTFET-based comparator architectures (two-stage, push-pull, double dynamic) were implemented and simulated in 32nm using HSPICE.

Analog-to-digital converter comparators (CNTFET-based and CMOS-based dynamic comparator architectures)

Comparative performance (area, average power, latency/speed, robustness to temperature and supply variations, scalability) of different comparator architectures for ADC applications

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2025-12-15
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Dasamandam Venkata Supriya
Saleem Syed
E. Kalyana Pallavi
A. Sahithi
Yadiki Ankitha
Thogata Bharath Kumar
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