Timing Analysis of Computer Hardware

Анализ временных характеристик компьютерной аппаратуры
Robert B. Hitchcock, Gordon L. Smith, David D. Cheng
1982-01-01

IBM 3081 Processor Unitclocked sequential machinesdesign automationstatistical timing designtiming analysis
Timing Analysis is a design automation program that assists computer design engineers in locating problem timing in a clocked, sequential machine. The program is effective for large machines because, in part, the running time is proportional to the number of circuits. This is in contrast to alternative techniques such as delay simulation, which requires large numbers of test patterns, and path tracing, which requires tracing of all paths. The output of Timing Analysis includes “slack” at each block to provide a measure of the severity of any timing problem. The program also generates standard deviations for the times so that a statistical timing design can be produced rather than a worst case approach. This system has successfully detected all but a few timing problems for the IBM 3081 Processor Unit (consisting of almost 800,000 circuits) prior to the hardware debugging of timing. The 3081 is characterized by a tight statistical timing design.
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It generates timing standard deviations, supporting statistical timing design instead of relying solely on worst-case analysis.
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Its runtime scales proportionally with the number of circuits, enabling analysis of large computer designs more efficiently than delay simulation or exhaustive path tracing.
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The program reports block-level slack values to quantify the severity of timing problems.
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The system detected all but a few timing problems in the nearly 800,000-circuit IBM 3081 Processor Unit before hardware timing debugging; the processor used a tight statistical timing design.
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Timing Analysis is a design-automation program for locating timing problems in clocked sequential machines.

IBM 3081 Processor Unit, a large clocked sequential computer machine

Timing behavior and statistical timing problems, including slack severity and timing variability across circuit blocks

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Publication Date
1982-01-01
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Authors
Robert B. Hitchcock
Gordon L. Smith
David D. Cheng
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