Secure and energy–efficient TRNG and NV–SRAM design using VGSOT–MTJ/CNTFET hybrid integration

Aditya Japa, Gowthami Gudisa, Vijay Rao Kumbhare
2025-10-18

SCID:  54.1/z65t9qun
Publication Details
Publication Date
2025-10-18
Journal
Publisher
ISSN
Access Type
Author Information
Authors
Aditya Japa
Gowthami Gudisa
Vijay Rao Kumbhare
Explore More Research
Use the citation graph to discover related papers and expand your research horizons.
Click any node to explore
Download PDF
100%